%
% This document describes an RF broad band Verilog-A resistance model.
% This model forms part of a new library of RF lumped element communication circuit
% design components.
%
% Copyright (C) 2005 Stefan Jahn <stefan@lkcc.org>
% Copyright (C) April 2014 Mike Brinson <mbrin72043@yahoo.co.uk>
%
% Permission is granted to copy, distribute and/or modify this document
% under the terms of the GNU Free Documentation License, Version 1.1
% or any later version published by the Free Software Foundation.
%


\documentclass[12pt,a4paper,oneside]{report}

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\tuttitle{
  A Tutorial}
\tutsubtitle{
  Subcircuit and Verilog-A RF Circuit Simulation Models for Axial and Surface Mounted Resistors}
\tutauthor{
    Mike Brinson}
\tutcopyright{
  Copyright \copyright{} 2014 Mike Brinson, Centre for Communications Technology, London Metropolitan University, London, UK.
  \textless  mbrin72043@yahoo.co.uk\textgreater}
\tutbookfalse

\tutstartup{\tutsubtitle}{Mike Brinson}

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\include{content}

\tutend
